When using PWM, what is the purpose of having two complimentary square waves on the same channel?PWM complementary square output waveformsA circuit question using multiple MOSFETs with PWM controlControlling multiple LEDs down to 0.25mADimming multiple LED panels without PWM to LEDs; modified DMX control or something else?How many PWM output channels does the Atmega4809 really have?Driver selection for high power LEDs
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When using PWM, what is the purpose of having two complimentary square waves on the same channel?
PWM complementary square output waveformsA circuit question using multiple MOSFETs with PWM controlControlling multiple LEDs down to 0.25mADimming multiple LED panels without PWM to LEDs; modified DMX control or something else?How many PWM output channels does the Atmega4809 really have?Driver selection for high power LEDs
.everyoneloves__top-leaderboard:empty,.everyoneloves__mid-leaderboard:empty,.everyoneloves__bot-mid-leaderboard:empty
margin-bottom:0;
$begingroup$
I'd like to use the PWM I/O on the SAMA5D2 Series Microprocessor (Microchip).What I'm confused about is why each PWM channel has a high and low output pin. The datasheet specifies
Each channel controls two complementary square output waveforms.
My understanding is that you only need one of these outputs to drive an external peripheral such as a fan. In what instance would two complementary PWM outputs be used?
Also, do I need these two complementary waveforms to drive a 4-wire PWM fan?
I've added a I/O description and timing diagram example from the datasheet for clarity.
pwm microprocessor timing
asked Sep 27 at 14:08
StarBeamStarBeam
212 bronze badges
$endgroup$
add a comment
|
$begingroup$
I'd like to use the PWM I/O on the SAMA5D2 Series Microprocessor (Microchip).What I'm confused about is why each PWM channel has a high and low output pin. The datasheet specifies
Each channel controls two complementary square output waveforms.
My understanding is that you only need one of these outputs to drive an external peripheral such as a fan. In what instance would two complementary PWM outputs be used?
Also, do I need these two complementary waveforms to drive a 4-wire PWM fan?
I've added a I/O description and timing diagram example from the datasheet for clarity.
pwm microprocessor timing
asked Sep 27 at 14:08
StarBeamStarBeam
212 bronze badges
$endgroup$
1
$begingroup$
Many SMPS topologies require complementary gate drive signals. Synchronous buck, push-pull, half bridge, etc.
$endgroup$
– John D
Sep 27 at 15:58
1
$begingroup$
I went ahead and merged the two questions, with this one as the master. This one asked the same question better.
$endgroup$
– W5VO
Sep 27 at 16:56
add a comment
|
$begingroup$
I'd like to use the PWM I/O on the SAMA5D2 Series Microprocessor (Microchip).What I'm confused about is why each PWM channel has a high and low output pin. The datasheet specifies
Each channel controls two complementary square output waveforms.
My understanding is that you only need one of these outputs to drive an external peripheral such as a fan. In what instance would two complementary PWM outputs be used?
Also, do I need these two complementary waveforms to drive a 4-wire PWM fan?
I've added a I/O description and timing diagram example from the datasheet for clarity.
pwm microprocessor timing
asked Sep 27 at 14:08
StarBeamStarBeam
212 bronze badges
$endgroup$
I'd like to use the PWM I/O on the SAMA5D2 Series Microprocessor (Microchip).What I'm confused about is why each PWM channel has a high and low output pin. The datasheet specifies
Each channel controls two complementary square output waveforms.
My understanding is that you only need one of these outputs to drive an external peripheral such as a fan. In what instance would two complementary PWM outputs be used?
Also, do I need these two complementary waveforms to drive a 4-wire PWM fan?
I've added a I/O description and timing diagram example from the datasheet for clarity.
pwm microprocessor timing
pwm microprocessor timing
asked Sep 27 at 14:08
StarBeamStarBeam
212 bronze badges
asked Sep 27 at 14:08
StarBeamStarBeam
212 bronze badges
edited Sep 27 at 14:29
StarBeam
asked Sep 27 at 14:08
StarBeamStarBeam
212 bronze badges
asked Sep 27 at 14:08
StarBeamStarBeam
212 bronze badges
asked Sep 27 at 14:08
StarBeamStarBeam
212 bronze badges
212 bronze badges
1
$begingroup$
Many SMPS topologies require complementary gate drive signals. Synchronous buck, push-pull, half bridge, etc.
$endgroup$
– John D
Sep 27 at 15:58
1
$begingroup$
I went ahead and merged the two questions, with this one as the master. This one asked the same question better.
$endgroup$
– W5VO
Sep 27 at 16:56
add a comment
|
1
$begingroup$
Many SMPS topologies require complementary gate drive signals. Synchronous buck, push-pull, half bridge, etc.
$endgroup$
– John D
Sep 27 at 15:58
1
$begingroup$
I went ahead and merged the two questions, with this one as the master. This one asked the same question better.
$endgroup$
– W5VO
Sep 27 at 16:56
1
1
$begingroup$
Many SMPS topologies require complementary gate drive signals. Synchronous buck, push-pull, half bridge, etc.
$endgroup$
– John D
Sep 27 at 15:58
$begingroup$
Many SMPS topologies require complementary gate drive signals. Synchronous buck, push-pull, half bridge, etc.
$endgroup$
– John D
Sep 27 at 15:58
1
1
$begingroup$
I went ahead and merged the two questions, with this one as the master. This one asked the same question better.
$endgroup$
– W5VO
Sep 27 at 16:56
$begingroup$
I went ahead and merged the two questions, with this one as the master. This one asked the same question better.
$endgroup$
– W5VO
Sep 27 at 16:56
add a comment
|
3 Answers
3
active
oldest
votes
$begingroup$
Imagine you drive something in a PUSH-PULL configuration; then, PWMH can drive the high-side switch, whereas PWML drives the low side switch. Many of these PWM controllers even have a dead-time functionality to guarantee that both switches aren't on simultaneously
answered Jan 28 at 14:17
Marcus MüllerMarcus Müller
42.8k3 gold badges69 silver badges112 bronze badges
$endgroup$
$begingroup$
What is the purpose of putting in dead-times in the PWM signal?
$endgroup$
– Abdel Aleem
Jan 28 at 14:23
3
$begingroup$
as I said in my last sentence.
$endgroup$
– Marcus Müller
Jan 28 at 14:24
$begingroup$
Could you put it in a more general context?
$endgroup$
– Abdel Aleem
Jan 28 at 14:26
5
$begingroup$
No, I can't. My sentence on push-pull is complete. You just have a look at any push-pull configuration and ask yourself what happens when that dead-time isn't there and both switches are on simultaneously. As I suggested in my answer.
$endgroup$
– Marcus Müller
Jan 28 at 14:29
$begingroup$
Because components are non-ideal (and sometimes other reasons), for example by having capacitance, relying on stuff happening simultaneously is a very bad idea particularly if it involves shorting your power rails through semiconductor power electronics. You need to leave wiggle-room.
$endgroup$
– Dannie
Sep 27 at 14:41
add a comment
|
$begingroup$
Complementary PWM signals can be useful in designing an inverter with full bridge configuration, where you need to drive two MOSFETs/switch complementary to each other. And dead time insertion comes handy to prevent these two complementary MOSFETS from being short during transition.
As you can see in the image, gate pulses to MOSFET1 and MOSFET3 should be complementary, similarly for MOSFET2 and MOSFET4.
answered Nov 23 at 11:47
R.TinkerR.Tinker
312 bronze badges
$endgroup$
add a comment
|
$begingroup$
Regarding having complimentary signals:
True complimentary signals are often used for common-mode noise suppression or for other reasons, as mentioned in the comments immediately below the question.
However, the diagram provided shows slight differences in timing, with the Low side versions starting later and completing sooner than the High side. As mentioned in another answer, hysteresis or avoidance of simultaneity may be part of the reasoning for the timing difference between the High and Low signals on the same channel. Also, the drawing implies quadrature, but that may just be for the example diagram.
I am not familiar with this device, nor with what the PWM interface was designed to work. Answers to those questions may help illuminate the reason for the extra lines, and (if you are lucky) might be discussed in the processor's data sheets or app notes.
Regarding a 4-wire PWM fan, I do not believe that both lines are necessary (at least for an inexpensive computer fan).
You may this link may be useful. https://www.ekwb.com/blog/what-is-pwm-and-how-does-it-work/ It provides information about the specifics of the wires and a reasonable bit of information regarding the use of PWM in an inexpensive 4-wire computer fan.
answered Sep 28 at 0:13
kking85743kking85743
1
$endgroup$
add a comment
|
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3 Answers
3
active
oldest
votes
3 Answers
3
active
oldest
votes
active
oldest
votes
active
oldest
votes
$begingroup$
Imagine you drive something in a PUSH-PULL configuration; then, PWMH can drive the high-side switch, whereas PWML drives the low side switch. Many of these PWM controllers even have a dead-time functionality to guarantee that both switches aren't on simultaneously
answered Jan 28 at 14:17
Marcus MüllerMarcus Müller
42.8k3 gold badges69 silver badges112 bronze badges
$endgroup$
$begingroup$
What is the purpose of putting in dead-times in the PWM signal?
$endgroup$
– Abdel Aleem
Jan 28 at 14:23
3
$begingroup$
as I said in my last sentence.
$endgroup$
– Marcus Müller
Jan 28 at 14:24
$begingroup$
Could you put it in a more general context?
$endgroup$
– Abdel Aleem
Jan 28 at 14:26
5
$begingroup$
No, I can't. My sentence on push-pull is complete. You just have a look at any push-pull configuration and ask yourself what happens when that dead-time isn't there and both switches are on simultaneously. As I suggested in my answer.
$endgroup$
– Marcus Müller
Jan 28 at 14:29
$begingroup$
Because components are non-ideal (and sometimes other reasons), for example by having capacitance, relying on stuff happening simultaneously is a very bad idea particularly if it involves shorting your power rails through semiconductor power electronics. You need to leave wiggle-room.
$endgroup$
– Dannie
Sep 27 at 14:41
add a comment
|
$begingroup$
Imagine you drive something in a PUSH-PULL configuration; then, PWMH can drive the high-side switch, whereas PWML drives the low side switch. Many of these PWM controllers even have a dead-time functionality to guarantee that both switches aren't on simultaneously
answered Jan 28 at 14:17
Marcus MüllerMarcus Müller
42.8k3 gold badges69 silver badges112 bronze badges
$endgroup$
$begingroup$
What is the purpose of putting in dead-times in the PWM signal?
$endgroup$
– Abdel Aleem
Jan 28 at 14:23
3
$begingroup$
as I said in my last sentence.
$endgroup$
– Marcus Müller
Jan 28 at 14:24
$begingroup$
Could you put it in a more general context?
$endgroup$
– Abdel Aleem
Jan 28 at 14:26
5
$begingroup$
No, I can't. My sentence on push-pull is complete. You just have a look at any push-pull configuration and ask yourself what happens when that dead-time isn't there and both switches are on simultaneously. As I suggested in my answer.
$endgroup$
– Marcus Müller
Jan 28 at 14:29
$begingroup$
Because components are non-ideal (and sometimes other reasons), for example by having capacitance, relying on stuff happening simultaneously is a very bad idea particularly if it involves shorting your power rails through semiconductor power electronics. You need to leave wiggle-room.
$endgroup$
– Dannie
Sep 27 at 14:41
add a comment
|
$begingroup$
Imagine you drive something in a PUSH-PULL configuration; then, PWMH can drive the high-side switch, whereas PWML drives the low side switch. Many of these PWM controllers even have a dead-time functionality to guarantee that both switches aren't on simultaneously
answered Jan 28 at 14:17
Marcus MüllerMarcus Müller
42.8k3 gold badges69 silver badges112 bronze badges
$endgroup$
Imagine you drive something in a PUSH-PULL configuration; then, PWMH can drive the high-side switch, whereas PWML drives the low side switch. Many of these PWM controllers even have a dead-time functionality to guarantee that both switches aren't on simultaneously
answered Jan 28 at 14:17
Marcus MüllerMarcus Müller
42.8k3 gold badges69 silver badges112 bronze badges
answered Jan 28 at 14:17
Marcus MüllerMarcus Müller
42.8k3 gold badges69 silver badges112 bronze badges
answered Jan 28 at 14:17
Marcus MüllerMarcus Müller
42.8k3 gold badges69 silver badges112 bronze badges
answered Jan 28 at 14:17
Marcus MüllerMarcus Müller
42.8k3 gold badges69 silver badges112 bronze badges
42.8k3 gold badges69 silver badges112 bronze badges
$begingroup$
What is the purpose of putting in dead-times in the PWM signal?
$endgroup$
– Abdel Aleem
Jan 28 at 14:23
3
$begingroup$
as I said in my last sentence.
$endgroup$
– Marcus Müller
Jan 28 at 14:24
$begingroup$
Could you put it in a more general context?
$endgroup$
– Abdel Aleem
Jan 28 at 14:26
5
$begingroup$
No, I can't. My sentence on push-pull is complete. You just have a look at any push-pull configuration and ask yourself what happens when that dead-time isn't there and both switches are on simultaneously. As I suggested in my answer.
$endgroup$
– Marcus Müller
Jan 28 at 14:29
$begingroup$
Because components are non-ideal (and sometimes other reasons), for example by having capacitance, relying on stuff happening simultaneously is a very bad idea particularly if it involves shorting your power rails through semiconductor power electronics. You need to leave wiggle-room.
$endgroup$
– Dannie
Sep 27 at 14:41
add a comment
|
$begingroup$
What is the purpose of putting in dead-times in the PWM signal?
$endgroup$
– Abdel Aleem
Jan 28 at 14:23
3
$begingroup$
as I said in my last sentence.
$endgroup$
– Marcus Müller
Jan 28 at 14:24
$begingroup$
Could you put it in a more general context?
$endgroup$
– Abdel Aleem
Jan 28 at 14:26
5
$begingroup$
No, I can't. My sentence on push-pull is complete. You just have a look at any push-pull configuration and ask yourself what happens when that dead-time isn't there and both switches are on simultaneously. As I suggested in my answer.
$endgroup$
– Marcus Müller
Jan 28 at 14:29
$begingroup$
Because components are non-ideal (and sometimes other reasons), for example by having capacitance, relying on stuff happening simultaneously is a very bad idea particularly if it involves shorting your power rails through semiconductor power electronics. You need to leave wiggle-room.
$endgroup$
– Dannie
Sep 27 at 14:41
$begingroup$
What is the purpose of putting in dead-times in the PWM signal?
$endgroup$
– Abdel Aleem
Jan 28 at 14:23
$begingroup$
What is the purpose of putting in dead-times in the PWM signal?
$endgroup$
– Abdel Aleem
Jan 28 at 14:23
3
3
$begingroup$
as I said in my last sentence.
$endgroup$
– Marcus Müller
Jan 28 at 14:24
$begingroup$
as I said in my last sentence.
$endgroup$
– Marcus Müller
Jan 28 at 14:24
$begingroup$
Could you put it in a more general context?
$endgroup$
– Abdel Aleem
Jan 28 at 14:26
$begingroup$
Could you put it in a more general context?
$endgroup$
– Abdel Aleem
Jan 28 at 14:26
5
5
$begingroup$
No, I can't. My sentence on push-pull is complete. You just have a look at any push-pull configuration and ask yourself what happens when that dead-time isn't there and both switches are on simultaneously. As I suggested in my answer.
$endgroup$
– Marcus Müller
Jan 28 at 14:29
$begingroup$
No, I can't. My sentence on push-pull is complete. You just have a look at any push-pull configuration and ask yourself what happens when that dead-time isn't there and both switches are on simultaneously. As I suggested in my answer.
$endgroup$
– Marcus Müller
Jan 28 at 14:29
$begingroup$
Because components are non-ideal (and sometimes other reasons), for example by having capacitance, relying on stuff happening simultaneously is a very bad idea particularly if it involves shorting your power rails through semiconductor power electronics. You need to leave wiggle-room.
$endgroup$
– Dannie
Sep 27 at 14:41
$begingroup$
Because components are non-ideal (and sometimes other reasons), for example by having capacitance, relying on stuff happening simultaneously is a very bad idea particularly if it involves shorting your power rails through semiconductor power electronics. You need to leave wiggle-room.
$endgroup$
– Dannie
Sep 27 at 14:41
add a comment
|
$begingroup$
Complementary PWM signals can be useful in designing an inverter with full bridge configuration, where you need to drive two MOSFETs/switch complementary to each other. And dead time insertion comes handy to prevent these two complementary MOSFETS from being short during transition.
As you can see in the image, gate pulses to MOSFET1 and MOSFET3 should be complementary, similarly for MOSFET2 and MOSFET4.
answered Nov 23 at 11:47
R.TinkerR.Tinker
312 bronze badges
$endgroup$
add a comment
|
$begingroup$
Complementary PWM signals can be useful in designing an inverter with full bridge configuration, where you need to drive two MOSFETs/switch complementary to each other. And dead time insertion comes handy to prevent these two complementary MOSFETS from being short during transition.
As you can see in the image, gate pulses to MOSFET1 and MOSFET3 should be complementary, similarly for MOSFET2 and MOSFET4.
answered Nov 23 at 11:47
R.TinkerR.Tinker
312 bronze badges
$endgroup$
add a comment
|
$begingroup$
Complementary PWM signals can be useful in designing an inverter with full bridge configuration, where you need to drive two MOSFETs/switch complementary to each other. And dead time insertion comes handy to prevent these two complementary MOSFETS from being short during transition.
As you can see in the image, gate pulses to MOSFET1 and MOSFET3 should be complementary, similarly for MOSFET2 and MOSFET4.
answered Nov 23 at 11:47
R.TinkerR.Tinker
312 bronze badges
$endgroup$
Complementary PWM signals can be useful in designing an inverter with full bridge configuration, where you need to drive two MOSFETs/switch complementary to each other. And dead time insertion comes handy to prevent these two complementary MOSFETS from being short during transition.
As you can see in the image, gate pulses to MOSFET1 and MOSFET3 should be complementary, similarly for MOSFET2 and MOSFET4.
answered Nov 23 at 11:47
R.TinkerR.Tinker
312 bronze badges
answered Nov 23 at 11:47
R.TinkerR.Tinker
312 bronze badges
answered Nov 23 at 11:47
R.TinkerR.Tinker
312 bronze badges
answered Nov 23 at 11:47
R.TinkerR.Tinker
312 bronze badges
312 bronze badges
add a comment
|
add a comment
|
$begingroup$
Regarding having complimentary signals:
True complimentary signals are often used for common-mode noise suppression or for other reasons, as mentioned in the comments immediately below the question.
However, the diagram provided shows slight differences in timing, with the Low side versions starting later and completing sooner than the High side. As mentioned in another answer, hysteresis or avoidance of simultaneity may be part of the reasoning for the timing difference between the High and Low signals on the same channel. Also, the drawing implies quadrature, but that may just be for the example diagram.
I am not familiar with this device, nor with what the PWM interface was designed to work. Answers to those questions may help illuminate the reason for the extra lines, and (if you are lucky) might be discussed in the processor's data sheets or app notes.
Regarding a 4-wire PWM fan, I do not believe that both lines are necessary (at least for an inexpensive computer fan).
You may this link may be useful. https://www.ekwb.com/blog/what-is-pwm-and-how-does-it-work/ It provides information about the specifics of the wires and a reasonable bit of information regarding the use of PWM in an inexpensive 4-wire computer fan.
answered Sep 28 at 0:13
kking85743kking85743
1
$endgroup$
add a comment
|
$begingroup$
Regarding having complimentary signals:
True complimentary signals are often used for common-mode noise suppression or for other reasons, as mentioned in the comments immediately below the question.
However, the diagram provided shows slight differences in timing, with the Low side versions starting later and completing sooner than the High side. As mentioned in another answer, hysteresis or avoidance of simultaneity may be part of the reasoning for the timing difference between the High and Low signals on the same channel. Also, the drawing implies quadrature, but that may just be for the example diagram.
I am not familiar with this device, nor with what the PWM interface was designed to work. Answers to those questions may help illuminate the reason for the extra lines, and (if you are lucky) might be discussed in the processor's data sheets or app notes.
Regarding a 4-wire PWM fan, I do not believe that both lines are necessary (at least for an inexpensive computer fan).
You may this link may be useful. https://www.ekwb.com/blog/what-is-pwm-and-how-does-it-work/ It provides information about the specifics of the wires and a reasonable bit of information regarding the use of PWM in an inexpensive 4-wire computer fan.
answered Sep 28 at 0:13
kking85743kking85743
1
$endgroup$
add a comment
|
$begingroup$
Regarding having complimentary signals:
True complimentary signals are often used for common-mode noise suppression or for other reasons, as mentioned in the comments immediately below the question.
However, the diagram provided shows slight differences in timing, with the Low side versions starting later and completing sooner than the High side. As mentioned in another answer, hysteresis or avoidance of simultaneity may be part of the reasoning for the timing difference between the High and Low signals on the same channel. Also, the drawing implies quadrature, but that may just be for the example diagram.
I am not familiar with this device, nor with what the PWM interface was designed to work. Answers to those questions may help illuminate the reason for the extra lines, and (if you are lucky) might be discussed in the processor's data sheets or app notes.
Regarding a 4-wire PWM fan, I do not believe that both lines are necessary (at least for an inexpensive computer fan).
You may this link may be useful. https://www.ekwb.com/blog/what-is-pwm-and-how-does-it-work/ It provides information about the specifics of the wires and a reasonable bit of information regarding the use of PWM in an inexpensive 4-wire computer fan.
answered Sep 28 at 0:13
kking85743kking85743
1
$endgroup$
Regarding having complimentary signals:
True complimentary signals are often used for common-mode noise suppression or for other reasons, as mentioned in the comments immediately below the question.
However, the diagram provided shows slight differences in timing, with the Low side versions starting later and completing sooner than the High side. As mentioned in another answer, hysteresis or avoidance of simultaneity may be part of the reasoning for the timing difference between the High and Low signals on the same channel. Also, the drawing implies quadrature, but that may just be for the example diagram.
I am not familiar with this device, nor with what the PWM interface was designed to work. Answers to those questions may help illuminate the reason for the extra lines, and (if you are lucky) might be discussed in the processor's data sheets or app notes.
Regarding a 4-wire PWM fan, I do not believe that both lines are necessary (at least for an inexpensive computer fan).
You may this link may be useful. https://www.ekwb.com/blog/what-is-pwm-and-how-does-it-work/ It provides information about the specifics of the wires and a reasonable bit of information regarding the use of PWM in an inexpensive 4-wire computer fan.
answered Sep 28 at 0:13
kking85743kking85743
1
answered Sep 28 at 0:13
kking85743kking85743
1
answered Sep 28 at 0:13
kking85743kking85743
1
answered Sep 28 at 0:13
kking85743kking85743
1
1
add a comment
|
add a comment
|
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1
$begingroup$
Many SMPS topologies require complementary gate drive signals. Synchronous buck, push-pull, half bridge, etc.
$endgroup$
– John D
Sep 27 at 15:58
1
$begingroup$
I went ahead and merged the two questions, with this one as the master. This one asked the same question better.
$endgroup$
– W5VO
Sep 27 at 16:56